A through-silicon via (TSV) is a vertical electrical connection passing completely through a silicon wafer or die. TSV technology is of interest, for example, in creating three-dimensional (3D) packages and 3D integrated circuits.
US Patent Application Publication No. 2007-0257373 of Akram et al. discloses methods of forming blind wafer interconnects, and related structures and assemblies. Methods for forming blind wafer interconnects (BWIs) from the back side surface of a substrate structure to the underside of a bond pad on the opposing surface includes the formation of a blind hole from the back side surface, forming a passivating layer therein, removing passivation material from the blind hole bottom, depositing at least one conductive layer within the blind hole, and filling the blind hole with solder or other conductive material or a dielectric material.
US Patent Application Publication No. 2007-0132105 of Akram et al. discloses selective activation of aluminum, copper, and tungsten structures. A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least one copper structure, or at least one structure comprising a mixture of aluminum and copper and the at least one second metal structure comprises at least one tungsten structure. One of the at least one first metal structure and the at least one second metal structure is activated toward metal plating without activating the other of the at least one first metal structure and the at least one second metal structure. An intermediate semiconductor device structure is also disclosed.
US Patent Application Publication No. 2006-0042952 of Oliver et al. discloses methods for forming interconnects in vias and microelectronic work pieces including such interconnects. The blind vias can be formed by first removing the bulk of the material from portions of the back side of the work piece without thinning the entire work piece. The bulk removal process, for example, can form a first opening that extends to an intermediate depth within the work piece, but does not extend to the contact surface of the electrically conductive element. After forming the first opening, a second opening is formed from the intermediate depth in the first opening to the contact surface of the conductive element. The second opening has a second width less than the first width of the first opening. This method further includes filling the blind vias with a conductive material and subsequently thinning the work piece from the exterior side until the cavity is eliminated.
Backside thinning and processing for through-silicon via (TSV) technology, a master's dissertation of Theron Rowbotham, M.S.E.E., University of Arkansas, 2006, available in volume 45/06 of Masters Abstracts, of Dissertations Abstracts International, at page 3254, discusses research performed to create through-silicon vias (TSVs) for chip stacking applications. This thesis discusses three of the processing steps involved in producing through-silicon vias; wafer bonding, wafer thinning, and exposing blind vias from the back side.